Scientist for Xilinx Embedded Software Development
For our location in Hamburg we are seeking: Scientist for Xilinx Embedded Software Development Limited: 3 years | Starting date: earliest possible | ID: MMA040/2021 | Deadline: open | Full-time/Part-time DESY, with its more than 2700 employees at its two locations in Hamburg and Zeuthen, is one of the world's leading research centres. Its research focuses on decoding the structure and function of matter, from the smallest particles of the universe to the building blocks of life. In this way, DESY contributes to solving the major questions and urgent challenges facing science, society and industry. With its ultramodern research infrastructure, its interdisciplinary research platforms and its international networks, DESY offers a highly attractive working environment in the fields of science, technology and administration as well as for the education of highly qualified young scientists. The group MSK is responsible for real-time data analysis and fast-feedback controls of beam stabilization systems, radiofrequency cavity control, special diagnostics and precision synchronization of particle accelerators at DESY. We are an international team of technicians, engineers and scientists who develop, install and operate complex instruments and embedded systems for the EuXFEL, FLASH and at PETRA. Embedded software development using Vivado HLS, Vitis with C/C++, OpenCL, and VHDL on Xilinx SoC, MPSoC and VERSAL chips for digital signal processing and low-latency fast-feedback controls of accelerators at DESY Implementation and integration of new tool chains and techniques in our firmware repository Analysis and verification of software and firmware programs Documentation and maintenance of projects MSc or PhD degree in electronic engineering, mathematics, physics, computer science or similar educations Embedded system engineer with several years of work experience with FPGA's, SoC's, MPSoC's from Xilinx Several years of work experience with Vivado, Vivado HLS, Xilinx SDK and ideally good knowledge of Vitis Very good knowledge in digital signal processing, processing algorithm and parallel processing on FPGAs Good knowledge of C/C++, OpenCL, VHDL, SystemRDL, Tcl, Python, Matlab Good knowledge on real-time operating systems and Linux Good ability to work in a team Very good English skills Look forward to a unique working environment on our international research campus. We attach particular importance to appreciative cooperation and the well-being of our DESY employees. Gender equality is an important aspect for us. To support work life balance we offer flexible working hours, variable part-time and job-sharing. You will benefit from our family-friendly and collegial atmosphere, our established health management and occupational pension provision. As a public employer, we offer you a secure workplace and facilitate your individual career with our comprehensive training and development opportunities. Remuneration is according to the regulations of the TV-AVH.